The invention relates to a matrix of two-position switches.
A matrix (array) of this kind has n inputs and p outputs. It routes any permutation of m incoming signals to the same number of outputs. The matrix is controlled so that all permutations of the m incoming signals are possible at m outputs. The numbers n and p can have any values. A matrix with p inputs and n outputs has a structure which is deduced by considerations of symmetry from that of a matrix with n inputs and p outputs. This being the case, the following description is restricted to a matrix for which the number p of outputs is not less than the number n of inputs.
Matrices of this kind are routinely used in telecommunications and computers. They are formed of a set of switches each of which has two inputs and two outputs. Each switch has two positions. In the first position the first input is connected to the first output and the second input is connected to the second output. In the second position the first input is connected to the second output and the second input is connected to the first output.
FIG. 1 shows one example of a prior art matrix with six inputs and six outputs.
In the figure, each switch 10 is represented by a square with two inputs e1, e2 and two outputs s1, s2.
In the position shown in full lines, e1 is connected to s1, and e2 to s2. In the second position, shown in dashed lines, e1 is connected to s2 and e2 to s1.
If a switch fails, the matrix may not be able to continue to function.
For a matrix to be able to tolerate the failure of a switch, the number of switches is generally greater than the minimum number needed.
To form a matrix tolerating failure of any switch, each switch 10 can be associated with a switch 12 connected in series, as shown in FIG. 2. If the switch 10 is stuck in one position, for example that corresponding to the connections e1-s1, and e2-s2, the switch 12 nevertheless enables e1 to be connected to sxe2x80x21, or to sxe2x80x22 and e2 to be connected to sxe2x80x22 or sxe2x80x21. However, that solution doubles the number of switches and is therefore costly.
On the other hand, if the aim is to limit the number of extra switches, the topology of the network equipped with additional switches must be determined case by case. This process is lengthy and complex if the number of inputs and outputs exceeds four or five.
The present invention is characterized in that each matrix is associated with an additional troubleshooting matrix which has the same number of inputs and outputs which is not less than the number n of inputs of the main matrix, the switches of the additional matrix being adapted so that it operates as a simple switch whose inputs consist of any pair of inputs of the troubleshooting matrix and whose two outputs consist of the two outputs of the troubleshooting matrix which have the same rank as the pair of inputs, the other inputs of the troubleshooting matrix being connected to the outputs of the same rank of that matrix.
It has been found that the only effect of the failure of a switch in the main matrix is that the signals at two particular outputs are permutated when an attempt is made to place the stuck switch in the inoperative position.
The troubleshooting matrix therefore has a much simpler role than the main matrix. It must be able to switch to a number C2n or C2p of pairs having the value:             C      2      n        =                  n        !                    2        ⁢                              (                          n              -              2                        )                    !                      ,            or      ⁢              xe2x80x83            ⁢              C        2        p              =                  p        !                    2        ⁢                              (                          p              -              2                        )                    !                    
whereas the main matrix must be able to form at least n! combinations. The troubleshooting matrix can therefore include a smaller number of switches and is easy to implement.
The inputs of the troubleshooting matrix can be connected to the outputs of the main matrix. The outputs of the troubleshooting matrix can be connected to the inputs of the main matrix. If a plurality of troubleshooting matrices is provided, they are connected in series, for example.
As an alternative to this, the troubleshooting matrix is inside the main matrix so that an input and an output of the same rank i of the troubleshooting matrix are interleaved into the path of a conductor conveying a signal to an output of particular rank ki of the main array, no other input/output pair of the troubleshooting matrix being interleaved into the path of the signal addressed to the output of rank ki of the main matrix.
In a first embodiment of the invention, a troubleshooting matrix intended for a main matrix with three inputs or outputs includes three switches connected in the following manner:
a first switch has an input constituting the first input of the troubleshooting matrix and an output of the same rank constituting the first output of the troubleshooting matrix and the second input of the first switch is connected to the first output of the second switch and its second output is connected to the first input of the third switch;
the inputs of the second switch constitute the second and third inputs of the troubleshooting matrix;
the outputs of the third switch constitute the second and third outputs of the troubleshooting matrix; and
the second output of the second switch is connected to the second input of the third switch.
When the number n or p is greater than 3, the troubleshooting matrix can be implemented progressively, starting from the observation that if a troubleshooting matrix is available of order n or p (i.e. with n or p inputs and n or p outputs) a troubleshooting matrix of order n+1 or p+1 can be obtained by adding to the matrix of order n or p two switches connected like the second and third switches of the array of order 3.
In this case, the first output of the second switch is connected to an input of any rank i of the matrix of order n or p and the first input of the third switch is connected to the output of rank i of the matrix of order n or p. The inputs of the second switch constitute two inputs of the matrix of order n+1 or p+1 and the outputs of the third switch constitute two outputs of the matrix of order n+1+ or p+1. The inputs of the matrix of order n+1 or p+1 consist of nxe2x88x921 or pxe2x88x921 remaining inputs of the matrix of order n or p (because the input of rank i of the matrix of order n or p is no longer usable) and the two inputs of the second switch. Likewise, the outputs of the matrix of order n+1 or p+1 consist of nxe2x88x921 or pxe2x88x921 remaining outputs of the matrix of order n or p and the two outputs of the third switch.
In this embodiment, the troubleshooting matrix includes 2nxe2x88x923 or 2pxe2x88x923 switches.
In another embodiment, which minimizes the number of switches, a troubleshooting matrix is provided with n or p switches connected in the following manner:
the first input and the first output of the switch of rank i respectively constitute the input and the output of rank i of the troubleshooting matrix;
the second input of each switch is connected to the second output of the switch of immediately higher rank; and
the second output of the switch of rank 1 is connected to the second input of the switch of rank n or p.
Regardless of which embodiment is chosen, the troubleshooting matrix corrects the main matrix fault that consists in a single switch of that matrix sticking.
If more severe faults are to be addressed, a plurality of troubleshooting matrices is used in which the number of troubleshooting matrices is equal to the predicted maximum number of switches that can be stuck simultaneously.
The present invention provides a matrix of two-position switches for transferring m input signals to the same number of outputs, the matrix being controlled so that all permutations of m incoming signals are possible at m outputs. The matrix is characterized in that it includes a main matrix and a troubleshooting matrix which has the same number of inputs and outputs, the switches of the troubleshooting matrix being adapted and controlled so that it operates as a simple switch whose inputs consist of any pair of inputs of the troubleshooting matrix and whose two outputs consist of the two outputs of the troubleshooting matrix which have the same rank as the pair of inputs, the other inputs of the troubleshooting matrix being connected to the outputs of the same rank of that matrix.
The number of inputs and outputs of the troubleshooting matrix is not less than the smaller of the two numbers n and p, where n is the number of inputs of the main matrix and p is the number of outputs of the main matrix.
In an embodiment of the invention the matrix includes a troubleshooting matrix with n+1 or p+1 inputs and n+1 or p+1 outputs, referred to as a matrix of order n+1 or p+1, obtained from a troubleshooting matrix with n or p inputs and n or p outputs, referred to as a matrix of order n or p, and two additional switches connected so that the first output of the first additional switch is connected to an input of rank i of the matrix of order n or p, the first input of the second additional switch is connected to the output of rank i of the matrix of order n or p, and the second output of the first additional switch is connected to the second input of the second additional switch, and the two inputs of the first additional switch constitute two inputs of the matrix of order n+1 or p+1 and the two outputs of the second additional switch constitute two outputs of the matrix of order n+1 or p+1.
In an embodiment of the invention the troubleshooting matrix includes n or p switches connected so that the first input and the first output of the switch of rank i respectively constitute the input and the output of rank i of the troubleshooting matrix, the second input of each switch is connected to the second output of the switch of immediately higher rank, and the second output of the switch of rank 1 is connected to the second input of the switch of rank n or p.
In a variant of this embodiment of the invention the troubleshooting matrix control means cause the switches corresponding to the pair of inputs and outputs to be switched to be operated in the event of a fault.
In an embodiment of the invention the troubleshooting matrix has p inputs and p outputs and its p inputs are connected to the p outputs of the main matrix.
In an embodiment of the invention the troubleshooting matrix is upstream of the main matrix and its n outputs are connected to the a inputs of the main matrix.
In an embodiment of the invention the troubleshooting matrix is inside the main matrix so that an input and an output of the same rank i of the troubleshooting matrix are interleaved into the path of a conductor carrying a signal to an output of particular rank of the main matrix, no other input/output pair of the troubleshooting matrix being interleaved into the path of the signal addressed to the output of particular rank of the main matrix.
In an embodiment of the invention the matrix includes a number of troubleshooting matrices equal to the predicted maximum number of switches of the main matrix which can be stuck simultaneously.